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c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . p m i c f o r l c d b i a s p o w e r f e a t u r e s g e n e r a l d e s c r i p t i o n i n p u t v o l t a g e r a n g e f r o m 2 . 7 v t o 5 . 5 v positive & negative charge pump for v gh & v gl h i g h p e r f o r m a n c e o p e r a t i o n a m p l i f i e r - + 1 0 0 m a o u t p u t s h o r t c i r c u i t c u r r e n t - 1 3 v / m s s l e w r a t e - 1 0 m h z , - 3 d b b a n d w i d t h c o n t r o l o u t p u t f o r e x t e r n a l p - m o s f e t t o s u p p o r t c o m p l e t e l y d i s c o n n e c t i n g t h e b a t t e r y a d j u s t a b l e p o w e r s e q u e n c e b y e x t e r n a l c a p a c i t o r i n t e r n a l s o f t - s t a r t c y c l e b y c y c l e c u r r e n t l i m i t m u l t i p l e o v e r l o a d p r o t e c t i o n o v e r t e m p e r a t u r e p r o t e c t i o n a v a i l a b l e i n t q f n 3 x 3 - 2 0 p a c k a g e h a l o g e n a n d l e a d f r e e a v a i l a b l e ( r o h s c o m p l i a n t ) a p p l i c a t i o n s p a n e l the APW7276 integrates with a high-performance step- up converter, two charge pump controllers and one high current operational amplifiers for tft-lcd applications. the main step-up regulator is a current-mode, fixed-fre- quency pwm switching regulator. the 1.5mhz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of lcd panel designs.the charge pump controllers provide regulated the gate-driver of tft-lcd v gh and v gl supplies.the am- plifiers are ideal for v com applications, with 100ma output short circuit current drive, 10mhz bandwidth, and 13v/ m s slew rate. all inputs and outputs are rail-to-rail. the APW7276 is available in a tiny 3mm x 3mm 20-pin qfn package (tqfn3x3-20). s i m p l i f i e d a p p l i c a t i o n c i r c u i t step - up converter positive charge pump negative charge pump vcom vin v sup v avdd v gh v gl v com p i n c o n f i g u r a t i o n = thermal pad ( connected to gnd plane for better heat dissipation ) gnd fbn drvn c d l y s u p v i n d r v p b s w g n d v s lx en f b p pos 6 1 0 9 8 7 2 0 1 6 1 7 1 8 1 9 v c o m 5 1 2 3 4 11 15 14 13 12 ps gnd f b gnd ( exposed pad ) gnd tqfn 3 x 3 - 20 top view ref
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 2 a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 ) symbol parameter rating unit vin input bias supply voltage ( vin to gnd) - 0.3 ~ 6 v lx, drp, drn, ps, sup, vs, pos, vcom to gnd voltage - 0.3 ~ 20 v fb, fbp, fbn, bsw, cdly, ref, en to gnd voltage - 0.3 ~ 6 v p d power dissipation internally limit w t j maximum junction temperature 150 o c t stg storage temperature - 65 ~ 150 o c t sdr maximum lead soldering temperature (10 seconds ) 26 0 o c note1: stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom- mended operating conditions" is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability o r d e r i n g a n d m a r k i n g i n f o r m a t i o n n o t e : a n p e c l e a d - f r e e p r o d u c t s c o n t a i n m o l d i n g c o m p o u n d s / d i e a t t a c h m a t e r i a l s a n d 1 0 0 % m a t t e t i n p l a t e t e r m i n a t i o n f i n i s h ; w h i c h a r e f u l l y c o m p l i a n t w i t h r o h s . a n p e c l e a d - f r e e p r o d u c t s m e e t o r e x c e e d t h e l e a d - f r e e r e q u i r e m e n t s o f i p c / j e d e c j - s t d - 0 2 0 d f o r m s l c l a s s i f i c a t i o n a t l e a d - f r e e p e a k r e f l o w t e m p e r a t u r e . a n p e c d e f i n e s ? g r e e n ? t o m e a n l e a d - f r e e ( r o h s c o m p l i a n t ) a n d h a l o g e n f r e e ( b r o r c l d o e s n o t e x c e e d 9 0 0 p p m b y w e i g h t i n h o m o g e n e o u s m a t e r i a l a n d t o t a l o f b r a n d c l d o e s n o t e x c e e d 1 5 0 0 p p m b y w e i g h t ) . apw 7276 handling code temperature range package code assembly material package code qb : tqfn 3 x 3 - 20 operating ambient temperature range i : - 40 to 85 o c handling code tr : tape & reel assembly material g : halogen and lead free device apw 7276 qb : xxxxx - date code apw 7276 xxxxx t h e r m a l c h a r a c t e r i s t i c s symbol parameter typical value unit q ja junction - to - ambient resistance in free air (note 2) tqfn3x3 - 20 50 c/w q j c case - to - ambient resistance in free air (note 2) tqfn3x3 - 20 12 c/w note 2: q ja is measured with the component mounted on a high effective thermal conductivity test board in free air.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 3 symbol parameter range unit vin input bias supply voltage ( vin to gnd) 2.7 ~ 5.5 v v sup main step - up converter output voltage vin ~ 15 v v gh positive charge pump output voltage 0 ~ 2*v sup - 2 v v gl negative charge pump output voltage - v sup +2 ~ v ref v c in input power capacitor 4.7 ~ m f l1 inductor range 1 ~ 10 m h c vgh v gh capacitor 0.22 ~ 2.2 m f c vgl v gl capacitor 0.22 ~ 2.2 m f c reff v ref capacitor 0.1 ~ 0.47 m f r1 feedback resistance of v sup 0.1 ~ 1 m w r4 feedback resistance of v gh 0.1 ~ 1 m w r6 feedback resistance of v gl 0.1 ~ 0.54 m w t a ambient temperature - 40 ~ 85 o c t j junction temperature - 4 0 ~ 125 o c r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s ( n o t e 3 ) note 3: refer to the typical application circuit. e l e c t r i c a l c h a r a c t e r i s t i c s u n l e s s o t h e r w i s e s p e c i f i e d , t h e s e s p e c i f i c a t i o n s a p p l y o v e r v i n = 3 . 6 v a n d t a = 2 5 o c . APW7276 symbol parameter test conditions min . typ . max . unit supply current vin input voltage range 2.7 - 5.5 v v fb = 1v, switching - 2 5 ma i vin vin supply current v fb = 1.3v, no switching - 300 - m a i sd vin shutdown input current en = gnd - 0.1 1 m a under voltage lockout (uvlo) vin uvlo threshold voltage 2.2 2.4 2.6 v uvlo hysteresis voltage 50 100 150 mv stet - up regulator v ref reference voltage vin=2.7v~5.5v, t a = - 40 ~ 85 o c, i ref = 0 ~ 2ma 1.225 1.25 1.275 v i ref reference voltage output current 2 - - ma v fb f b regulation voltage vin=2.7v~5.5v, t a = - 40 ~ 85 o c 1.225 1.25 1.275 v f sw switching frequency v fb = 1.1v 1.25 1.5 1.75 mhz r on power switch on resistance vin = 3.6v - 0.5 - w i lim power switch current limit 2.0 - - a lx leakage current v en = gnd, v lx =0v or 5v, vin = 5v - 1 - 1 m a d max lx maximum duty cycle 92 95 98 % i fb fb input current - 50 - 50 na
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 4 e l e c t r i c a l c h a r a c t e r i s t i c s ( c o n t . ) APW7276 symbol parameter test conditions min . typ . max . unit soft - start and shutdown t ss step - up regulator soft - start duration (note 4) - 2 - ms en high threshold v en rising - - 1 v v ten en low threshold v en falling 0.4 - - v i en en leakage curr ent v en = 5v, vin = 5v - 1 - 1 m a i bsw bsw pull - down current 3 5 10 m a bsw to vin ron - 200 - w i cdly cdly charge current - 10 - m a cdly high threshold v gl soft - start without delay from v sup - 1 - v ps to gnd leakage current v ps =15v - - 100 na ps to gnd on resistance - 1k - w internal switch r vs sup to vs on resistance - 50 - w sup to vs leakage current - - 100 na vs soft - start duration (note 4) - 2 - ms positive regulated charge pump v fbp f bp regulation voltage vin=2.7v~5.5v, t a = - 40 ~ 85 o c 1.225 1.25 1.275 v i fbp fbp input current - 50 - 50 na i drvp rms drvp output current v s up = 12v 5 - - ma drp on resistance high - 20 - w drp on resistance low - 3.5 - w positive charge pump frequency 400 500 600 khz t ssp positive charge pump soft - start duration (note 4) - 2 - ms negative regulated charge pump v fbn f bn regulation voltage vin=2.7v~5.5v, t a = - 40 ~ 85 o c - 25 0 25 mv i fbn fbn input current - 50 - 50 na i drvn rms drvn output current v sup = 12v 5 - - ma drn on resistance high - 5 - w drn on resistance low - 12 - w negative charge pump frequency 400 500 600 khz t ssn negative charge pump soft - start duration (no te 4) - 2 - ms u n l e s s o t h e r w i s e s p e c i f i e d , t h e s e s p e c i f i c a t i o n s a p p l y o v e r v i n = 3 . 6 v a n d t a = 2 5 o c .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 5 e l e c t r i c a l c h a r a c t e r i s t i c s ( c o n t . ) APW7276 symbol parameter test conditions min . typ . max . unit sequence t del1 ps delay time (note 4) - 15 - ms t del2 delay time between v avdd to v gl (note 4) 1 - 15 ms t del3 delay time between v gl to v gh (note 4) - 15 - ms vcomp buffer a ol open lo op gain (note 4) - 110 - db i out =100 m a v sup - 15 v sup - 3 - mv v oh output voltage high i out =5ma v sup - 150 v sup - 80 - mv i out =100 m a - 2 15 mv v ol output voltage low i out =5ma - 80 150 mv i sc short circuit current 50 70 - ma i vcom continuous output current ? 40 - - ma vcom discharge resistance - 2 - k w psrr po wer supply rejection ratio (note 4) 60 - - db bw - 3db bandwidth (note 4) - 10 - mhz gbwp gain bandwidth product (note 4) - 8 - mhz sr slew rate (note 4) - 13 - v/ m s u n l e s s o t h e r w i s e s p e c i f i e d , t h e s e s p e c i f i c a t i o n s a p p l y o v e r v i n = 3 . 6 v a n d t a = 2 5 o c . note 4: guarantee by design, not production test
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 6 p i n d e s c r i p t i o n pin tqfn3x3 - 20 name function 1,4,11,16 gnd signal and power ground. connect these pins to exposed pad. 2 ref internal 1.25v reference voltage output. connect 1 m f capacitor to this pin. 3 fbn negative charge pump feedback input. 5 drvn regulated charg e pump driver for v gl . connect to flying cap acitor . 6 drvp regulated charge pump driver for v gh . connect to flying cap acitor . 7 sup this is the supply pin of the positive and negative charge pump driver . c onnected this pin to the output of the main step - up converter v s up . 8 vs the supply voltage of positive charge pump regulator. 9 fbp positive charge pump feedback input. 10 vcom vcom output. 12 pos non - inverting input of vcom. 13 ps this is the gate drive pin which can be used to control an external p - channel mosfet to provide input to output isolation of v sup or v avdd . see the typical application section. ps is an open - drain output and is pulled low as soon as the delay time of cdly setting is expired . ps goes high impedance when the en is low. 14 en enable pin. logic high initiates power - up sequencing. logic low disable the device. 15 lx step - up converter inductor/diode connection. 17 fb main step - up converter feedback input. 18 bsw bi - direction switch control pin. this switch disconnects vout f rom vin during shutdown and any fault evens. 19 vin ic power input. 20 cdly delay setting capacitor connection pin. connecting a capacitor from this pin to gnd allows the setting of delay time between v sup to v gl during start - up. pull this pin exceed 1v ignore the delay time. exposed pad gnd signal and power ground.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 7 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s i avdd vs . efferency 0 20 40 60 80 100 0 100 200 300 400 500 input current ( ma ) e f f i c i e n c y ( % ) vin = 3 . 3 v vin = 5 . 0 v v out = 9 . 5 v v avdd vs . i avdd 8 . 0 8 . 2 8 . 4 8 . 6 8 . 8 9 . 0 9 . 2 9 . 4 9 . 6 9 . 8 10 . 0 0 100 200 300 400 500 i avdd ( ma ) v a v d d ( v ) vin = 3 . 3 v vin = 5 . 0 v vin vs . v ref 1 . 075 1 . 125 1 . 175 1 . 225 2 . 0 3 . 0 4 . 0 5 . 0 6 . 0 vin ( v ) v r e f ( v ) vin vs . fsw 1 . 0 1 . 2 1 . 4 1 . 6 1 . 8 2 . 0 2 . 4 3 . 4 4 . 4 5 . 4 vin ( v ) f s w ( m h z ) vin vs . v avdd 8 . 0 8 . 5 9 . 0 9 . 5 10 . 0 2 . 7 3 . 2 3 . 7 4 . 2 4 . 7 5 . 2 vin ( v ) i avdd = 100 ma i avdd = 200 ma v a v d d ( v ) junction temperature vs . v ref 1 . 24 1 . 242 1 . 244 1 . 246 1 . 248 1 . 25 1 . 252 - 50 0 50 100 150 junction temperature ( o c ) v r e f ( v )
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 8 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s junction temperature vs . f sw 1 . 3 1 . 35 1 . 4 1 . 45 1 . 5 1 . 55 - 50 0 50 100 150 junction temperature ( o c ) f s w ( m h z )
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 9 o p e r a t i n g w a v r f o r m s t h e t e s t c o n d i t i o n s a r e a p w 7 2 7 6 , v i n = 3 . 3 v , v a v d d = 9 . 5 v , v g l = - 8 . 2 v , v g h = 1 6 . 8 v , v c o m = v a v d d / 2 , t a = 2 5 o c u n l e s s o t h e r w i s e s p e c i f i e d . boost converter pwm continuous mode : heavy load i l v lx 1 2 3 v avdd - ac time : 400 n s / div vin = 3 . 3 v , v avdd = 9 . 5 v / 300 ma , l = 2 . 2 uh ch 2 : v avdd - ac , 1 00 m v / div , a c ch 1 : v lx , 5 v / div , dc ch 3 : i l , 5 00 ma / div , dc boost converter pwm discontinuous mode : light load time : 400 n s / div vin = 3 . 3 v , v avdd = 9 . 5 v / 50 ma , l = 2 . 2 uh ch 2 : v avdd - ac , 1 00 m v / div , a c ch 1 : v lx , 5 v / div , dc ch 3 : i l , 5 00 ma / div , dc i l v lx 1 2 3 v avdd - ac ch 2 : v gl , 5 v / div , dc ch 1 : v sup , 5 v / div , dc ch 3 : v gh , 10 v / div , dc ch 4 : v com , 5 v / div , dc vin = 3 . 3 v , v avdd = 9 . 5 v / 30 ma , v gl = - 8 . 2 v / 8 . 2 kohm , v gh = 16 . 8 v / 18 kohm , en power on power - on sequence time : 20 m s / div 1 2 3 4 v sup v gl v gh v com power - off sequence v sup v gl v gh v com time : 20 m s / div ch 2 : v gl , 5 v / div , dc ch 1 : v sup , 5 v / div , dc ch 3 : v gh , 10 v / div , dc ch 4 : v com , 5 v / div , dc vin = 3 . 3 v , v avdd = 9 . 5 v / 30 ma , v gl = - 8 . 2 v / 8 . 2 kohm , v gh = 16 . 8 v / 18 kohm , en power on 1 2 3 4
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 0 o p e r a t i n g w a v r f o r m s t h e t e s t c o n d i t i o n s a r e a p w 7 2 7 6 , v i n = 3 . 3 v , v a v d d = 9 . 5 v , v g l = - 8 . 2 v , v g h = 1 6 . 8 v , v c o m = v a v d d / 2 , t a = 2 5 o c u n l e s s o t h e r w i s e s p e c i f i e d . boost converter load transient response time : 10 m s / div ch 2 : i avdd , 200 ma / div , dc ch 1 : v avdd - ac , 100 m v / div , ac vin = 3 . 3 v , v avdd = 9 . 5 v , l = 2 . 2 uh 1 i avdd v avdd - ac 2
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 1 gate driver pwm logic control current sense amplifier slope compensation 1 . 5 mhz oscill - ator vin ref ref vin uvlo otp shutdown and soft - start control sup drvp vgh logic control drvn vgl logic control sup fbp ref sup fbn 1 v vgl soft - start bsw ps fbok current limit comparator current ref logic control lx 10 m a s hutdown en 15 ms delay vs gnd 5 m a fb en pos vcom cdly ref ok fbok q 1 q 2 q 3 q 4 eamp comp fb n 2 p 2 n 1 p 1 q 5 b l o c k d i a g r a m
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 2 t y p i c a l a p p l i c a t i o n c i r c u i t lx fb ps sup drvn fbn ref vin c 3 ( option ) v i n en v avdd vcom pos fbp drvp on off gnd r 1 68 0 k r 2 68 k d 1 v sup c 4 10 m f 16 v c 5 1 m f 16 v r 3 1 m q 1 apm 2301 cac q 2 apm 2309 ac v s v gh c 6 1 m f 16 v c 7 1 m f 25 v cdly c 1 4 . 7 m f 6 . 3 v c 2 4 . 7 m f 6 . 3 v c 8 0 . 1 m f 16 v c 9 0 . 22 m f r 4 68 0 k r 5 56 k l 1 2 . 2 m f v gl c 10 0 . 47 m f c 11 1 m f c 12 0 . 1 m f c 14 0 . 1 m f v com c 13 1 m f r 8 300 k r 1 8 300 k r 7 45 k r 6 300 k v sup r 9 100 k c 15 0 . 22 m f vs b s w c 16 1 m f 16 v c 1 7 22 p f
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 3 p o w e r o n s e q u e n c e v en v bsw v sup v ps v gl v gh 15 ms t cdly v s 15 ms v ref v bsw < 1 v 2 ms 2 ms 2 ms v com time the output voltage falling slew rate after shutdown depend on external resistance beside v com .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 4 f u n c t i o n d e s c r i p t i o n the under-voltage lockout (uvlo) circuit compares the input voltage at vin with the uvlo threshold to ensure the input voltage is high enough for reliable operation. the 100mv (typ) hysteresis prevents supply transients from causing a restart. once the input voltage exceeds the uvlo rising threshold, startup begins. when the in- put voltage falls below the uvlo falling threshold, the controller turns off the converter. m a i n s t e p - u p c o n v e r t e r c o n t r o l l o o p the APW7276 is a constant frequency, synchronous rec- tifier and current-mode switching regulator. in normal operation, the internal main switch (q1) is turned on each cycle. the peak inductor current at which eamp turn off the q1 is controlled by the voltage on the comp node which is the output of the error amplifier (eamp). an external resistive divider connected between v sup and ground allows the eamp to receive an output feedback voltage v fb at fb pin. when the load current increases, it causes a slightly decrease in v fb relative to the reference voltage, which in turn causes the comp voltage to in- crease until the average inductor current matches the new load current. at light load current, the comp voltage is low. the APW7276 auto skips pulse. v i n u n d e r - v o l t a g e l o c k o u t ( u v l o ) m a i n s t e p - u p c o n v e r t e r c u r r e n t l i m i t t h e a p w 7 2 7 6 i n t e g r a t e d a c u r r e n t - l i m i t - c o m p a r a t o r i n m a i n s t e p - u p c o n v e r t e r . i t m o n i t o r s t h e i n d u c t o r c u r r e n t , f l o w s t h r o u g h t h e n - c h a n n e l m o s f e t , a n d l i m i t s t h e c u r - r e n t p e a k a t c u r r e n t - l i m i t l e v e l t o p r e v e n t l o a d s a n d t h e a p w 7 2 7 6 f r o m d a m a g i n g d u r i n g o v e r l o a d o r s h o r t - c i r - c u i t c o n d i t i o n s . p u l s e s k i p m o d u l a t i o n APW7276 auto skip pulse at light load. v r e f t h e v r e f i n i t i a t e s s o f t - s t a r t p r o c e s s a f t e r p o r a n d e n g o e s h i g h . s h u t d o w n i f p o r a n d e n g o e s l o w . c d l y c o n n e c t i n g a c a p a c i t o r f r o m t h i s p i n t o g n d a l l o w s t h e s e t t i n g o f d e l a y t i m e b e t w e e n v g l a n d v s u p . o n c e t h e v s u p s o f t - s t a r t p r o c e s s e n a b l e d , a n i n t e r n a l 1 0 m a c u r r e n t s o u r c e s t a r t s t o c h a r g e c d l y , t h e v g l c h a n n e l i n i t i a t e s s o f t - s t a r t p r o c e s s o n c e v c d l y e x c e e d 1 v . i f t h e v c d l y e x c e e d s 1 v b e f o r e v s u p s t a r t u p , t h e v s u p a n d v g l s t a r t u p s i m u l t a n e o u s l y . b s w o n c e v r e f i s w i t h i n 8 % o f i t s n o r m a l r e g u l a t e d o u t p u t v o l t a g e , a n i n t e r n a l c u r r e n t s o u r c e f r o m t h e b s w t o g n d t o p u l l b s w l o w . o n c e t h e v b s w b e l o w 1 v , t h e s t e p - u p c o n v e r t e r i n i t i a t e s s o f t - s t a r t p r o c e s s . t h e v b s w p u l l t o v i n i f m a i n s t e p - u p c u r r e n t l i m i t d e t e c t e d w i t h o u t d e l a y , e n p u l l l o w o r v i n b e l o w p o r . p s t h i s i s t h e g a t e d r i v e p i n w h i c h c a n b e u s e d t o c o n t r o l a n e x t e r n a l m o s f e t s w i t c h t o p r o v i d e i n p u t t o o u t p u t i s o l a - t i o n o f v s u p o r v a v d d . s e e t h e t y p i c a l a p p l i c a t i o n s e c t i o n . p s i s a n o p e n - d r a i n o u t p u t a n d i s l a t c h l o w a s s o o n a s t h e s t e p - u p c o n v e r t e r i s w i t h i n 1 0 % o f i t s n o r m a l r e g u - l a t e d o u t p u t v o l t a g e f o r 1 5 m s . g d g o e s h i g h i m p e d a n c e w h e n t h e e n i n p u t v o l t a g e i s c y c l e l o w . a n i s o l a t i o n s w i t c h f r o m v s u p t o v s ( q 2 ) t h e v s i s t h e v o l t a g e s o u r c e o f p o s i t i v e c h a r g e p u m p , v g h . a s s o o n a s t h e v g l s t a r t - u p f o r 1 5 m s , t h e p - f e t , q 2 , s w i t c h s o f t o n . t h e q 2 f u l l y t u r n s o n a f t e r 2 m s . t h e q 2 t u r n s o f f a t q 1 c u r r e n t l i m i t d e t e c t e d a n d e n g o e s l o w . o p e r a t i o n a l a m p l i f i e r t h e o p e r a t i o n a l a m p l i f i e r i s t y p i c a l l y u s e d t o d r i v e t h e l c d b a c k p l a n e ( v c o m ) o r t h e g a m m a - c o r r e c t i o n d i v i d e r s t r i n g . t h e y f e a t u r e + 1 0 0 m a o u t p u t s h o r t - c i r c u i t c u r r e n t , 1 3 v / m s s l e w r a t e , a n d 8 m h z b a n d w i d t h . t h e r a i l - t o - r a i l i n p u t a n d o u t p u t c a p a b i l i t y m a x i m i z e s s y s t e m f l e x i b i l i t y .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 5 f u n c t i o n d e s c r i p t i o n ( c o n t . ) p o s i t i v e c h a r g e p u m p f i g 1 . p o s i t i v e c h a r g e p u m p r e g u l a t o r b l o c k d i a g r a m the positive charge-pump regulator is typically used to generate the positive supply rail for the tft lcd gate driver ics. the output voltage is set with an external re- sistive voltage-divider from its output to gnd with the midpoint connected to fbp. the charge pump includes a high-side p-channel mosfet (p1) and a low-side n-chan- nel mosfet (n1) to control the power transfer as shown in figure 1. during the first half-cycle, n1 turns on and charges flying capacitors c8 (figure 1). during the sec- ond half cycle, n1 turns off and p1 turns on, level shifting c8 by v sup volts. the amount of charge transferred to the output is determined by the error amplifier that controls p1?s on-resistance. the positive charge-pump regulator?s startup can be delayed from negative charge pump after 15ms, the positive charge-pump regulator is enabled. each time it is enabled, the positive charge-pump regu- lator goes through a soft-start routine by ramping up its internal reference voltage from 0 to 1.25v. the soft-start period is 2ms (typ). the soft-start feature effectively limits the inrush current during startup. n e g a t i v e c h a r g e p u m p the negative charge-pump regulator is typically used to generate the negative supply rail for the tft lcd gate driver ics. the output voltage is set with an external re- sistive voltage-divider from its output to ref with the midpoint connected to fbn. the number of charge pump stages and the setting of the feedback divider determine the output of the negative charge-pump regulator. the charge-pump controller includes a high-side p-channel mosfet (p2) and a low-side n-channel mosfet (n2) to control the power transfer as shown in figure 2. during the first half cycle, p2 turns on, and flying capaci- tor c10 charges to v sup minus a diode drop (figure 2). during the second half cycle, p2 turns off, and n2 turns on, level shifting c10. this connects c10 in parallel with reservoir capacitor c11. if the voltage across c11 minus a diode drop is greater than the voltage across c10, charge flows from c11 to c10 until the diode (d5) turns off. the amount of charge transferred from the output is determined by the error amplifier, which controls n2?s on-resistance. the negative charge-pump regulator is enabled when the step-up regulator reaches regulation and v cdly ex- ceed 1v. each time it is enabled, the negative charge- pump regulator goes through a soft-start routine by ramp- ing down its internal reference voltage from 1.25v to 0mv. the soft-start period is 2ms typically. the soft-start fea- ture effectively limits the inrush current during startup. p 1 n 1 500 khz vs c 15 c 8 drvp v gh gnd c 7 v s fbp 1 . 25 v r 5 r 4 sup f i g 2 . n e g a t i v e c h a r g e p u m p r e g u l a t o r b l o c k d i a g r a m p 2 n 2 500 khz sup c 15 c 10 drvn v gl gnd c 11 fbn r 7 r 6 ref d 5
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 6 f u n c t i o n d e s c r i p t i o n ( c o n t . ) the over-temperature circuit limits the junction tempera- ture of the APW7276. when the junction temperature ex- ceeds 160 o c, a thermal sensor turns off the power mosfet allowing the devices to cool. the thermal sen- sor allows the converters to start a soft-start process and regulates the output voltage again after the junction tem- perature cools by 40 o c. the otp is designed with a 40 o c hysteresis to lower the average junction temperature (t j ) during continuous thermal overload conditions in- creasing the lifetime of the device. o v e r - t e m p e r a t u r e p r o t e c t i o n ( o t p ) l a y o u t c o n s i d e r a t i o n f o r a l l s w i t c h i n g p o w e r s u p p l i e s , t h e l a y o u t i s a n i m p o r - t a n t s t e p i n t h e d e s i g n ; e s p e c i a l l y a t h i g h p e a k c u r r e n t s a n d s w i t c h i n g f r e q u e n c i e s . i f t h e l a y o u t i s n o t c a r e f u l l y d o n e , t h e r e g u l a t o r m i g h t s h o w n o i s e p r o b l e m s a n d d u t y c y c l e j i t t e r . 1 . t h e i n p u t c a p a c i t o r c 1 a n d c 1 6 s h o u l d b e p l a c e d c l o s e t o t h e v i n / s u p a n d g n d . c o n n e c t i n g t h e c a p a c i t o r w i t h v i n / s u p a n d g n d p i n s b y s h o r t a n d w i d e t r a c k s f o r f i l t e r i n g a n d m i n i m i z i n g t h e i n p u t v o l t a g e r i p p l e . 2 . t h e i n d u c t o r a n d s c h o t t k y d i o d e s h o u l d b e p l a c e d a s c l o s e a s p o s s i b l e t o t h e l x p i n t o m i n i m i z e l e n g t h o f t h e c o p p e r t r a c k s a s w e l l a s t h e n o i s e c o u p l i n g i n t o o t h e r c i r c u i t s . 3 . a s t a r g r o u n d c o n n e c t i o n o r g r o u n d p l a n e m i n i m i z e s g r o u n d s h i f t s a n d n o i s e i s r e c o m m e n d e d . 4 . s i n c e t h e f e e d b a c k p i n ( f b x ) a n d n e t w o r k i s a h i g h i m p e d a n c e c i r c u i t t h e f e e d b a c k n e t w o r k s h o u l d b e r o u t e d a w a y f r o m t h e i n d u c t o r . t h e f e e d b a c k p i n a n d f e e d b a c k n e t w o r k s h o u l d b e s h i e l d e d w i t h a g r o u n d p l a n e o r t r a c e t o m i n i m i z e n o i s e c o u p l i n g i n t o t h i s c i r c u i t . f i g u r e 3 . r e c o m m e n d e d m i n i m u m f o o t p r i n t t q f n 3 x 3 - 2 0 0 . 4 mm 0 . 25 mm * just recommend 0 . 6 mm * 1 . 6 5 m m 1 . 65 mm 0 . 275 mm
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 7 p a c k a g e i n f o r m a t i o n t q f n 3 x 3 - 2 0 pin 1 d e s y m b o l min . max . 0 . 80 0 . 00 0 . 15 0 . 25 1 . 50 1 . 80 0 . 05 1 . 50 a a 1 b d d 2 e e 2 e l millimeters a 3 0 . 20 ref tqfn 3 x 3 - 20 0 . 30 0 . 50 1 . 80 0 . 008 ref min . max . inches 0 . 031 0 . 000 0 . 006 0 . 010 0 . 059 0 . 071 0 . 059 0 . 012 0 . 020 0 . 70 0 . 071 0 . 028 0 . 002 0 . 40 bsc 0 . 016 bsc k 0 . 20 0 . 008 2 . 90 3 . 10 0 . 114 0 . 122 2 . 90 3 . 10 0 . 114 0 . 122 note : 1 . followed from jedec mo - 220 weee a b a 1 a 3 nx aaa c aaa 0 . 08 0 . 003 pin 1 corner d 2 e 2 k l e
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 8 application a h t1 c d d w e1 f 330 ? 2.00 50 min. 12.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 12.0 ? 0.30 1.75 ? 0.10 5.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tqfn3x3 - 20 4.0 ? 0.10 8.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0 .40 3.30 ? 0.20 3.30 ? 0.20 1.30 ? 0.20 (mm) d e v i c e s p e r u n i t c a r r i e r t a p e & r e e l d i m e n s i o n s package type unit quantity tqfn3x3 - 20 tape & reel 3000 a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1 h t1 a d
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 1 9 t a p i n g d i r e c t i o n i n f o r m a t i o n t q f n 3 x 3 - 2 0 c l a s s i f i c a t i o n p r o f i l e user direction of feed
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 2 0 c l a s s i f i c a t i o n r e f l o w p r o f i l e s profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spec ified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined a s a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ t j =125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a1 15 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma r e l i a b i l i t y t e s t p r o g r a m
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 3 - j u n . , 2 0 1 3 a p w 7 2 7 6 w w w . a n p e c . c o m . t w 2 1 c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8

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